Efficient Hardware Architectures and Algorithms for Embedded Vision Systems
Résumé
Abstract :
In this talk we develop three main axes i) design of efficient hardware architectures, ii) computational efficient algorithms targeted for embedded vision systems and iii) hardware support for self-aware computing.
We will introduce recent advances within the unifying framework of mathematical morphology. We propose a first morphological processor with arbitrarily large neighborhoods. It allows to obtain previously unachieved performances for serially composed morphological filters, geodesical and conditional operators. The cited processor is based on a novel algorithm formulation of morphological dilation.
Finally, the applicative domain will be illustrated in scene understanding context for self aware embedded computing.
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