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Article Dans Une Revue International Journal of Electronics Année : 2008

Performances Comparison between Multilevel Hierarchical and Mesh FPGA Interconnects

Hayder Mrabet
Christian Masson
  • Fonction : Auteur

Résumé

This paper evaluates a new multilevel hierarchical FPGA (MFPGA). The specific architecture includes two unidirectional programmable networks: a downward network based on the Butterfly-Fat-Tree topology; and a special upward network. New tools are developed to place and route several benchmark circuits on this architecture. Comparison with the traditional symmetric Manhattan mesh architecture shows that MFPGA can implement circuits with a smaller area and better speed.
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Dates et versions

hal-01195976 , version 1 (08-09-2015)

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Zied Marrakchi, Hayder Mrabet, Christian Masson, Habib Mehrez. Performances Comparison between Multilevel Hierarchical and Mesh FPGA Interconnects. International Journal of Electronics, 2008, 95 (3), pp.275-289. ⟨10.1080/00207210701828069⟩. ⟨hal-01195976⟩
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