A 16-channel Silicon Strips Readout Chip in 180nm CMOS technology

M. Dhellot (1) , J.-F. Genat (1) , H. Lebbolo (1) , T.-H. Pham (1) , A. Savoy-Navarro (1)

1 LPNHE - Laboratoire de Physique Nucléaire et de Hautes Énergies

A highly integrated readout scheme for Silicon trackers making use of Deep Sub-Micron CMOS electronics (DSM) and analog sampling techniques is presented. In the context of the International Linear Collider (ILC) tracking detectors developments, a 16-channel readout chip for Silicon strips detector has been designed in 180nm CMOS technology, each channel comprising a low noise amplifier, a pulse shaper, a sample and hold and a comparator operated at low power. Test results are presented.

Domaines: Instrumentations et Détecteurs [physics.ins-det]

M. Dhellot, J.-F. Genat, H. Lebbolo, T.-H. Pham, A. Savoy-Navarro. A 16-channel Silicon Strips Readout Chip in 180nm CMOS technology. 2005 International Linear Collider Physics and Detector Workshop and Second ILC Accelerator Workshop, Aug 2005, Snowmass, United States. pp.ALCPG1321. ⟨in2p3-00125225⟩